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Computing with Memory
Results: 472

#	Item
411	Model checking transactional memory with Spin John O’Leary Intel [removed] Bratin Saha Add to Reading List Source URL: www.markrtuttle.com Language: English - Date: 2011-09-30 00:00:00 Data management Data Software transactional memory Serializability Linearizability Transactional memory Schedule Non-blocking algorithm Transmission Control Protocol Concurrency control Transaction processing Computing
412	Brief Announcement: Model Checking Transactional Memory with Spin John O’Leary Bratin Saha Add to Reading List Source URL: www.markrtuttle.com Language: English - Date: 2008-11-16 00:00:00 Computing Data Software transactional memory Linearizability Transactional memory Model checking SPIN model checker Serializability Parallel computing Concurrency control Transaction processing Data management
413	Disrupting the Norm with Supernatural Shenanigans Nick Freeman a.k.a. vt Kiwicon 7 Twitter: @0x7674 Add to Reading List Source URL: www.security-assessment.com Language: English - Date: 2013-11-12 15:16:06 Computing Electronics Software testing Embedded systems Hacking Vulnerability Microcontroller ECC memory Soft error Computer memory Computer hardware Digital electronics
414	www.HLNAND.com enabling Ultra-High Bandwidth Scalable SSDs with HLnand Add to Reading List Source URL: www.conversantip.com Language: English - Date: 2014-04-07 11:02:03 Non-volatile memory Standards organizations Solid-state drive Computer buses Open NAND Flash Interface Working Group Flash memory PCI Express Serial ATA IOPS Computer hardware Computing Computer memory
415	Early experience with the Barrelfish OS and the Single-Chip Cloud Computer Simon Peter, Adrian Schüpbach, Dominik Menzi and Timothy Roscoe Systems Group, Department of Computer Science, ETH Zurich Abstract—Traditiona Add to Reading List Source URL: www.barrelfish.org Language: English - Date: 2011-07-07 08:25:09 Computer memory Computer buses Inter-process communication Cloud computing Single-chip Cloud Computer CPU cache Direct memory access Cache Mach Computing Computer hardware Computer architecture
416	Appeared in the Conference on Architectural Support for Programming Languages and Operating Systems (ASPLOS), October[removed]Performance of Database Workloads on Shared-Memory Systems with Out-of-Order Processors Parthas Add to Reading List Source URL: barroso.org Language: English - Date: 2005-03-07 23:35:18 Computer engineering Cache CPU cache Computer memory Microarchitecture Out-of-order execution Instruction-level parallelism Pentium Pro Parallel computing Computer architecture Computer hardware Central processing unit
417	The HFD series - is a non-volatile solid state disk that incorporates Hagiwara Sys-Com’s proprietary TRUESSD® controller. The TRUESSD® controller, in conjnction with on-board SDRAM, utilizes an advanced segmented ca Add to Reading List Source URL: www.hsc-us.com Language: English - Date: 2011-02-08 04:27:56 Flash memory Solid-state drive S.M.A.R.T. CPU cache Cache Dynamic random-access memory Computer memory Computer hardware Computing
418	Translating Facebook into Endangered Languages Kevin Scannell Saint Louis University, St. Louis, Missouri, USA [[removed]] Abstract: Facebook is an incredibly popular social networking site, with more than 900 mi Add to Reading List Source URL: borel.slu.edu Language: English - Date: 2012-09-18 21:26:53 Software Web 2.0 Translation memory Machine translation Language revitalization Translation Chewa language Facebook Welsh language Computer-assisted translation World Wide Web Computing
419	Finalization should not be based on reachability Hans-J. Boehm HP Labs (This benefited from discussions with Mike Spertus and others.) Add to Reading List Source URL: www.hboehm.info Language: English - Date: 2014-02-06 19:37:32 Computer programming Data types Method Object-oriented programming Automatic memory management Finalizer Weak reference Destructor Keepalive Computing Software engineering Memory management
420	How to Miscompile Programs with “Benign” Data Races Hans-J. Boehm Date: [removed] © Copyright 2011 Hewlett-Packard Development Company, L.P. Add to Reading List Source URL: www.hboehm.info Language: English - Date: 2014-02-06 19:37:31 Lock Thread Hewlett-Packard C dynamic memory allocation Computing Computer hardware Concurrency control

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